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EDUCATION
TSINGHUA UNIVERSITY,
DEPARTMENT OF ELECTRONIC ENGINEERIN, Beijing
Candidate for a Master of Science, Electronic Engineering,
Jul 2007
OVERALL GPA: 84.6 MAJOR GPA: 83.6
BEIJING NORMAL UNIVERSITY,
COLLEGE OF INFOMATION SCIENCE AND TECHNOLOGY,
Beijing
Bachelor of Science, Science and Technology of Electronic Information, July 2004
OVERALL GPA: 88.6 MAJOR GPA: 89.7
SELECTED AWARDS
3rd Class Scholarship of BNU Scholarship for Academic, 2003
3rd prize of 18th Beijing’s Undergraduate Physics Olympiad, 2001
2nd Class Scholarship of BNU Scholarship for Academic, 2002
2nd Class Scholarship of BNU Scholarship for Academic, 2001
STANDARD TEST
GRE(06/2006):
Verbal 520 , Quantitative 800, Analytical Writing 4.0
TOEFL (iBT)(09/2006):
Reading 29 Listening 27 Speaking 19 Writing 27 Total 102/120
RESEARCH INTERESTS
- Computer Architecture and Design
- Embedded System Architecture and Design
- Hardware/Software Codesign
- Application-Specific Instruction-set Processor(ASIP)
- Design Space Exploration
- High Performance Embedded Computing(HPEC)
- Signal Processing on FPGA and Multiprocessor System
- Middlware for Embedded Computing(VSIPL++,MPI)
- Rapid Prototyping of Signal Processing System
- Modeling and Simulation of Heterogenous Embedded System
- Algorithms
- Realtime Signal Processing Algorithms
- Image Processing and Pattern Recognition
- Parallel Signal Processing Algorithms
PERSONAL INTERESTS
Hiking,Climbing Mountains,Reading Novels,Watching Moives and Listening Musics
Research EXPERIENCE
Rapid Prototyping and implementing of Signal Processing System on Multiprocessor System
06/2006--present
Introduction: As the cost of developing parallel program for signal processing on multi-processor system increased sharply, there is a huge need for finding efficient way to developing portable, scalable, and high performance system. My research mainly focuses on developing an efficient method to implement signal processing systems rapidly on multi-processor systems by using COTS products and Middleware such as MPI and VSIPL/VSIPL++ as building blocks.
Porting uClinux and running VoIP application on ADI Blackfin BF533
06/2006
Introduction: As a course project of DSP Architecture Analysis, I ported uClinux to custom develop board based on BF533. In the project, I ported Uboot to the board and wrote various drivers for the board such as framebuffer driver and sound codec driver. Finally I ran microwin(embedded GUI) and Linphone (VoIP terminal) successfully on the platform. The whole project only took me two weeks and my final score of the course is 97.
Signal Processing System on Multi-processor System(Part of a National Key Project)
08/2005 --08/2006
Introduction: I designed and implemented signal processing system on SKY Computer Inc’s COTS product SKY Bolt2 which consists of a SPARC SBC and 2 daughter cards. Each of the daughter cards consists of 4 PowerPc7440 as its computing node. The host node runs Sloaris 8 and the PowerPC node can run SKYvec or Vxworks. By using dataflow methodology, I designed and implemented a software framework for signal processing purpose on heterogeneous system. The project finished successfully and can make reconfiguration on the fly. I published a paper [1] on it
Participated in Implementation Video Over IP System on TI DM642
06/2005--08/2005
Introduction: I designed the software. By using the TI’s Reference Framework 5( RF5) which based on dataflow methodology and commercial algorithm blocks, I implemented the whole function requirements of the system rapidly.
Personal Health Information System based on WinCE.Net (Project supported by MSRA)
09/2004 --06/2005
Introduction: I designed and implemented embedded system based on WindowsCE to collect human body’s information and send them to remote database powered by Sqlserver2000. The embedded system was based on S3C2410(ARM9) and used USB to receive information collected by sensors. Finally, I took part in the Microsoft Research Asia(MSRA) Theme Workshop on Embedded System and made a poster and published a paper[0] based on it.
Smart Home Network Simulation System based on wireless communication chip (Project supported by BNU Undergraduate Student Research Plan)
06/2003 --06/2004
Introduction:I applied for and get the financial support from The Undergraduate Student Research Plan of BNU to do research on Smart Home. I lead a 4 students group to implement a simulation system of Home network based on wireless communication chip. Finally, we demonstrated the potential power of smart home successfully.
Participated in National EDA Competition of 2003
08/2003
Introduction: I designed a logic analyzer based on 8051 and FPGA (Flex10k10) . Through the competition, I had extensive experiences on electric system design and the value of teamwork.
Assistant of EDA Lab of Beijing Normal University
08/2002--09/2003
Introduction:Responsibilities included preparation of EDA experiments for the students and solving the problems encountered by the students. I also wrote some chapters of experiment manual.
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