Sampling Effects and Slope Considerations

by Brad Suppanz



This paper shows an example of using discrete time equations to study the sampling effects for a boost converter with peak current control and continuous conduction mode.  The familliar stability boundary (d < 1 / 2) for peak current mode control without slope compensation will be derived in terms of inductor current slopes.

Figure 1 below shows the inner current loop for the peak current mode controlled boost converter.  In general, the output voltage would be controlled by the outer voltage loop.  The output voltage is held contstant here to analyze the current loop dynamics and is shown as a battery.
 
Figure 1.  Peak Current Mode Controlled Boost Converter.
Figure 2 shows the inductor current waveform.  Note that IL(k) is defined as the current at the beginning of a switching cycle.  During each switching cycle, the current starts at IL(k), then move up to Ic(k), then down to IL(k+1).  Ic(k) is the "commanded" current.  The nature of the circuit insures that the peak inductor current will follow Ic(k) without any interesting dynamics or ringing.  However, IL(k) does exhibit some interesting dynamics, so the transfer function from Ic(k) to IL(k+1) will be studied.
 
Figure 2.  Inductor Current Waveform.
The slopes of the inductor current are as follows:

And times t1 and t2 are: Then, IL(k+1) would be: Rearranging: Equation 5c has the form of an Infinite Impulse Response (IIR) filter with an offset of: So, Equation 5c becomes: It is helpful to draw a block diagram representation of Equation 5d as shown in Figure 3 below.
 
Figure 3.  Block diagram representation of Equation 5d.
 
We can go into the "z-transform" domain by setting the "Offset" term's AC value to zero and introducing the "z-1" delay operator: So, the transfer function is: and the pole is at: Since m1 and m2 are defined as positive numbers (see Equations 1 and 2), the pole will be on the left side of the real axis of the z-plane as shown in Figure 4 below.  For stability, the pole must be inside the unit circle.
 
Figure 4.  Pole Location and Stability Boundary.
The condition for stability is therefor: Then, from Equations 1 and 2: Or, In terms of duty cycle (which is): the stability condition becomes: Or,
 

    d < 1 / 2        (Equation 8c)

 
Thus, for the converter to be stable, the duty cycle must be kept below 1/2.  Further study can be done by using Excel (or another spreadsheet) to observe the step response of the transfer function (Equation 5f).  It is also useful to study the transfer function and loop gain in the s-domain by using the delay operator " e-s*Ts " instead of " z-1 ".

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© Copyright 1997 Brad Suppanz.  All rights reserved.
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Written 9/17/97
Last updated 7/20/04 
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